Confident of winning Satara Lok Sabha seat by a big margin: Udayanraje Bhosale

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BJP’s current Rajya Sabha member Udayanraje Bhosale has finally been declared the Lok Sabha candidate from the prestigious Satara seat of Maharashtra. Responding after the announcement of his candidacy, Bhosale expressed confidence He said he would win by a margin of more than two lakh votes and the constituency was no longer a Congress-NCP stronghold.

Chhatrapati Shivaji Maharaj’s descendant Udayanraje Bhosale also said that the atmosphere is favorable for the saffron party in the country. Speaking to PTI, Bhosale said, “This is a National elections and candidates The announcement was made in phases. The third phase of voting will be held in Satara on May 7 and the candidature has been announced at the right time. I am confident of winning this seat by more than two lakh votes.”

It is noteworthy that Udayanraje Bhosale is a three-time Lok Sabha MP from Satara from undivided NCP. In 2019 too, he won the Satara seat as an undivided NCP candidate, but resigned within a few months and joined the BJP. But in the by-election he lost to NCP’s Srinivas Patil as BJP candidate. Later he was nominated by BJP for Rajya Sabha.

“Now, four assembly constituencies (in Satara) we have Mahayuti alliance. In Karad North and Karad South, the BJP had secured the second position,” he said while speaking to PTI, adding that he has already completed the first round of campaigning. Bhosale will contest against the Sharad Pawar-led NCP, which has fielded Shashikant Shinde from Satara.

Satara, in Western Maharashtra, is an important and historical constituency for Maharashtra. This is the place where the descendants of Maratha warrior Chhatrapati Shivaji Maharaj live. The constituency has traditionally been dominated by Bhosale, but as the NCP undivided candidate. Maharashtra belt is one such belt where NCP has been a powerhouse.

Udayanraje will face a tough competition from Sharad Pawar led NCP. Voting will be held in this constituency on 7 May.

(With PTI inputs)